Video LVDS SerDes Transmitter-Recevier IP Core
Video LVDS SerDes Transmitter-Receiver IP Core   Features 7:1 Serializer/Deserializer (SerDes) Optimized for 8 and 10-bit HD video applications Supports both 28-bit and 35-bit parallel data (mapped into 4 / 5 LVDS channels) Supports Flat Panel resolutions up to 1080p 120Hz an

HyperDrive Multi-port DDR2 Memory Controll IP Core
HyperDrive Multi-port DDR2 Memory Controller IP Core   Features 400 MHz / 800 Mbps DDR2 memory performance Up to 10 local bus native RD or WR ports Configurable FIFO depth: 16 to 2048 bytes Memory data width: up to 128 bits Local bus width from 8 to 128-bits Integrated PH

Streaming Multi-port SDRAM Memory Controller IP core
Streaming Multi-port SDRAM Memory Controller IP Core    Features 200/333 MHz (400/666 Mbps) Cyclone / Stratix memory performance SDR, DDR, DDR2 and Mobile DDR SDRAM memory devices Up to 10 native RD or WR ports Memory data width: 8/16/32/64-bit Local bus width from 8 to 12

Avalon Multi- port SDRAM Memory Controller IP Core
Avalon Multi-port SDRAM Memory Controller IP Core      Features 200 / 333 MHz (400/666 Mbps) Cyclone / Stratix DDR2 memory performance SDR, DDR, DDR2 and Mobile DDR SDRAM Memory Devices From 1 to 16 Avalon-MM local bus port interfaces Memory bandwidth utilizati

Avalon Multi-port DDR2 Mwmory Controller IP Core
Avalon Multi-port DDR2 Memory Controller IP Core      Features 200 MHz (400 Mbps) Cyclone memory performance Low cost DDR2 Memory Controller for Cyclone devices From 1 to 16 Avalon-MM local bus port interfaces Memory bandwidth utilization in excess of 95%

Avalon mobile DDR Memory Controller IP Core
Avalon Mobile DDR Memory Controller IP Core     Key Features 200 MHz Cyclone / Stratix memory performance Supports all standard Mobile DDR SDRAM devices 1 to 16 Avalon® independent local bus port interfaces Avalon Pipelined and Burst transfers Avalon-MM local bus width from 8 to

Arrow Bemicro SDK
Arrow BeMicro SDK - Mobile DDR Memory Controller IP Core & Reference Design     BeMicro SDK – Embedded Control Made EasyMicrotronix in conjunction with Arrow, Altera, and other IP vendors have partnered to make the evaluation of your next embedded control design easier

l2C-Slave-PIO IP Core Master
I2C Master-Slave-PIO IP Core   Features I2C Master/Slave Transmitter & Receiver IP core I2C 8-bit PIO Slave core I2C bus transmission speeds; 100Kbps, 400Kbps & 1Mbps Own address and general call address detection Input clock filter Meets Philips I2C -bus specific

Camera Link Trancevier IP Core
Camera Link Tranceiver IP Core     Key Features Supports Medium & Full Camera Link interfaces Supports 64-bit and 80-bit extended Full configurations Camera and Frame Grabber configurations 7:1 Camera Link Serializer/Deserializer (SerDes) Transmission cl