회사소개
협력사
Terasic-FGPA Series
All FPGA Main Board
- Stratix III, IV, V
- Arria II. V
- Cyclone II, III, IV, V
- Bundle Solution
- USB Blaster
- max10
Daughter Card
- Interface conversion
- Video & Image
- Networking
- AD/DA
- Capsense
- Multimedia
- RF
SOC Platform
Microtronix-FPGA Series
IP Core
HSMC Daughter Card
Configurable Processor
FPGA Board
- HD Dev Solution
University Training Classes
Universities Classes using the DE2 Series
Altera 온라인 데모
Design Software
Embedded Processors
Licensing
Bundled Solutions
ARM Development Kit
ARM Development Kit
Single board computers
Computer-on-Module
AS 수리
dimocore.com/terasicrepair
자료실
고객센터
공지사항
문의게시판
 
 
Microtronix-FPGA Series > IP Core
   
l2C-Slave-PIO IP Core Master 
 
가    격 : 견적문의
중    량 : 1g

I2C Master-Slave-PIO IP Core

I2C Master-Slave-PIO IP Core

 

Features

  • I2C Master/Slave Transmitter & Receiver IP core
  • I2C 8-bit PIO Slave core
  • I2C bus transmission speeds; 100Kbps, 400Kbps & 1Mbps
  • Own address and general call address detection
  • Input clock filter
  • Meets Philips I2C -bus specification version 2.1
  • 7-bits addressing format
  • Single byte transmit and receive buffer
  • Santa Cruz I2C development board (optional)
  • VHDL
  • 300 LE's for Avalon M/S, 100 LE's for PIO

Overview

The Microtronix I2C Master/Slave/PIO IP Core is a complete I2C solution offering three modes of operation and support for standard I2C bus transmission speeds. The I2C Master/Slave core provide a generic memory-mapped bus interface. Also designed as an Altera Qsys component, it integrates easily into any Qsys generated system using an Nios® II Avalon bus. 
The Microtronix I2C PIO Slave core is provided as an Altera Quartus II Megafunction and integrated into the Altera MegaWizard Plug-in Manager. 
The core is optimized for all Altera FPGA's, including the newest generation of Stratix, Arria, Cyclone and MAX II devices. 

Other Features

  • Encrypted source code
  • Linux Master driver
  • ModelSim Test Bench
  • Includes perpetual IP Core license and 1 year of maintenance updates
  • 1-Hour of Installation Support
  • Santa Cruz I2C development board (optional)

License Options

  • Node Locked: Supports a single user. It is tied to the NIC ID of a PC.
  • Floating Server: Supports multiple users, typically 2 or 5 seats.
  • Source Code: VHDL or SystemVerilog
Part Number: 6232-01-02
MSRP: $2,495.00 USD
Server License (Optional Upgrade)
2 User Floating Server $500
5 User Floating Server $1000
I2C IP Core Source Code (Optional Upgrade)
VHDL Source $2500
SystemVerilog Source $2500


 


상호명
: (주)우림티앤아이   대표자명 : 김석범   사업자등록번호 : 211-87-88913  이메일 : jun@woorimtni.co.kr
본사 : 서울 강남구 봉은사로 129 거평타운 1204호 대표전화 : 82-2-512-7661  팩스 : 82-2-512-7662
Copyright(C) 2011 Woorimtni Technologies All Rights Reserved.