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The demonstrations listed in Table 1 show basic design procedures in Quartus^® II software. Most of them are based on the Quartus II software tutorials that are available in Quartus II Help.

Topics	Self-Running Demonstrations(Playing Time)	Documentation	Training Courses
Table 1. Basic FPGA/CPLD Design Demonstrations
Design Entry	(3 minutes 34 seconds)	Design Entry chapter of the Introduction to the Quartus II Software(PDF)	VHDL Basics (Online, 1.5 hours) Verilog Basics (Online, one hour) The Quartus Software Interactive Tutorial(Online, 4 hours) Using Quartus II Software: An Introduction (Online, 1.5 hours) Chinese Version: Using Quartus II Software: An Introduction(Online, 1.5 hours) Introduction to VHDL (Instructor-led, one day) Introduction to Verilog HDL (Instructor-led, one day) The Quartus II Software Design Series: Foundation (Online, 8 hours) Chinese Version: The Quartus II Software Design Series: Foundation (Online, 8 hours)
Compilation	(2 minutes 24 seconds)	Synthesis and Place & Route chapters of the Introduction to the Quartus II Software(PDF)	The Quartus II Software Design Series: Foundation (Online, 8 hours) Chinese Version: The Quartus II Software Design Series: Foundation (Online, 8 hours)
TimeQuest Timing Analyzer	(9 minutes)	TimeQuest Timing Analyzer (PDF) chapter of the Quartus II Development Software Handbook Switching to the TimeQuest Timing Analyzer (PDF) chapter of the Quartus II Development Software Handbook	Switching to the TimeQuest Timing Analyzer (Online, 1 hour) TimeQuest Timing Analyzer (Online, 1.5 hours) Chinese Version: Validating Performance with the TimeQuest Timing Analyzer (Online, 1 hour) The Quartus II Software Design Series: Foundation (Instructor-led, one day) The Quartus II Software Design Series: Timing Analysis (Instructor-led, one day) The Quartus II Software Design Series: Foundation (Online, 8 hours) Chinese Version: The Quartus II Software Design Series: Foundation (Online, 8 hours) Constraining and Analyzing Timing for Source Synchronous Circuits with TimeQuest(Online, 1 hour) Constraining and Analyzing Double Data Rate Source Synchronous Interfaces (Online, 1 hour)
Simulation	(1 minute 51 seconds)	Verification volume of the Quartus II Development Software Handbook Simulation chapter of the Introduction to the Quartus II Software(PDF)	Using Quartus II Software: Simulation(Online, 0.5 hour) Chinese Version: Using Quartus II Software: Simulation(Online, 0.5 hour) Overview of Mentor Graphics® ModelSim®Software (Instructor-led, one day) The Quartus II Software Design Series: Verification(Instructor-led, one day)
Programming	(1 minute 9 seconds)	Programming & Configuration chapter of the Introduction to the Quartus II Software(PDF)	The Quartus II Software Design Series: Verification(Instructor-led, one day)
Scripting	(5 minutes 39 seconds)	Scripting and Constraint Entry (PDF)section of the Quartus II Development Software Handbook	Introduction to Tcl, Part 1of 2 (Online, one hour) Introduction to Tcl, Part 2 of 2 (Online, one hour) Basic Quartus II Software Tcl Scripting, Part 1 of 2 (Online, one hour) Basic Quartus II Software Tcl Scripting, Part 2 of 2 (Online, one hour) Command-Line Scripting (Online, one hour)

Quartus II Software Online Demonstrations—Basic FPGA/CPLD Design Procedures