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Training Classes FPGA > Universities Classes using the DE2
University of Cambridge- ECAD and Architecture Practical Classes
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ECAD and Architecture Practical Classes
Prerequisite learning using the on-line Intelligent Verilog Compiler
About the ECAD Labs
DE2 Board
VGA Information
MIPS Information
Lab 1 - Pong
Lab 2 - Game of Life
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News:
2007-10-19 - An alternative version of the Verilog download (
game_of_life_alt.zip
) for Lab 2 has been provided since some people are having problems synthesising the design from the original version. Further testing will be take place in the next few days
2007-10-24 - Testing of the alternative Game of Life zip file indicated that it worked ok but was using a slightly old version of the processor. A new Quartus Archive (
game_of_life_archive.qar
) has been prepared which contains the latest version of the processor and it has been tested. Hopefully there will be no further glitches.
Acknowledgements:
Many thanks to Ben Roberts and Greg Chadwick for refining the MIPS processor design and preparing the laboratory material. Thanks are also due to Robin Message and David Simner for their initial MIPS processor design and tool chain. We are very grateful to several people at Altera for technical advice, continued financial support and boards at low cost.
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