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Terasic-FGPA Series > Daughter Card > RF
   
HSMC ARRadio Daughter Card 
 
°¡    °Ý : °ßÀû¹®ÀÇ
Áß    ·® : 100g

The ARRadio-HSMC is an HSMC board for the AD9361, a highly integrated RF Agile Transceiver¢â. While the complete chip level design package can be found on the the ADI web site. Information on the card, and how to use it, the design package that surrounds it, and the software which can make it work, can be found here.

The purpose of the ARRadio-HSMC is to provide an RF platform to which shows maximum performance of the AD9361. It¡¯s expected that the RF performance of this platform can meet the datasheet specifications without issues at 2.4 GHz, and not much anywhere else. This is due to the external Johanson Technology's 2450BL15B050E 2.45 GHz Balun that is on the board. This balun is rated for a operating frequency of 2400~2500 MHz.

This platform is primarily for hardware / RF investigation and bring up of various waveforms from a RF team before their custom hardware is complete, where they want to see waveforms at their frequency of interest, and are not afraid of changing out the balun if necessary. (Have a look in the Configuration sections).

For more details, please visit:
http://wiki.analog.com/resources/eval/user-guides/arradio

 

Receive

  • Supports up to 2 direct conversion RF receive channels
  • Fully integrated snythesizers (including loop filter)
  • Data path consists of LNA, Demodulator, LPF, ADC and digital filters
  • AGC, Quadrature calibration and DC offset calibration
  • NF: 2.5dB @1GHz
  • ADC: Continous time sigma-delta, 640MSPS
  • Digital Filters: 128 complex taps, decimation between 2 and 48
  • Gain: 1dB step size, 80dB analog range, 30dB digital range (post ADC scaling)
  • On-chip sensor for temperature-corrected RSSI

Transmit

  • Supports up to 2 direct conversion RF transmit channels
  • Fully integrated snythesizers (including loop filter)
  • Data path consists of digital filters, DAC and Modulators
  • Digital Filters: 128 complex taps, interpolation between 2 and 48
  • Gain: 0.25dB step size, 86dB range.
  • DAC: 320MSPS

Clocking

The clocks are managed by the device and are software programmable. Please refer to the device data sheet for the various clocks within the device. The board provides a 40MHz crystal for the AD9361.

SPI

The SPI signals are directly passed to the HSMC connector.

Control/Monitor

The device allows real-time control via dedicated pins. These signals are passed to the HSMC connector. The functionality of these pins are programmable and includes gain, synchronization, state machine control etc. Please refer to the data sheet for more details.

The device also allows real-time monitoring of internal signals via another set of dedicated pins. Again, these signals are passed to the HSMC connector. The internal signals are multiplexed into these pins- and details of which are best described in the data sheet.

Power

Key components:

ADP1755Low dropout, linear regulator, 1.2A, 1.6 to 3.6V
ADP2164ACPZHigh Efficiency,Step-Down DC-to-DC Regulator

The board receives all the power from the FPGA board through HSMC.

Connectivity

The ARRadio can be connected to the following Terasic FPGA Development Boards:

¡¡ Connect SoCKit

 

•Size£º78.1x84.12 mm

 

Documents

TitleVersionSize(KB)Date AddedDownload
ARRadio Quick Start Guide 1.0.0 10092015-07-09
Schematic 1.0.0 1232015-06-26
ARRadio User Guide 1.0.0  2015-05-29

Please note that all the source codes are provided "as is". For further support or modification, please contact Terasic Support and your request will be transferred to Terasic Design Service.
More resources about IP and Dev. Kit are available on Altera User Forums.

 

Linux Image

TitleMin. MicroSD CapacitySize(KB)Date AddedDownload
SoCKit and ARRadio8GB1.2GB2015-03-03

For help and support, please visit:
http://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/help_and_support

      

  • ARRadio Board
  • ARRadio Quick Start Guide
  • USB OTG Cable
  • 8GB MicroSD Card with Card Reader (Pre-programmed)
 


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